Browsing Theses by Author "Neale, Adam"
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Design and Analysis of an Adjacent Multi-bit Error Correcting Code for Nanoscale SRAMs
Neale, Adam (University of Waterloo, 2014-12-02)Increasing static random access memory (SRAM) bitcell density is a major driving force for semiconductor technology scaling. The industry standard 2x reduction in SRAM bitcell area per technology node has lead to a ... -
Digital Timing Control in SRAMs for Yield Enhancement and Graceful Aging Degradation
Neale, Adam (University of Waterloo, 2010-08-16)Embedded SRAMs can occupy the majority of the chip area in SOCs. The increase in process variation and aging degradation due to technology scaling can severely compromise the integrity of SRAM memory cells, hence resulting ...