Browsing Electrical and Computer Engineering by Author "Wu, Zheng Pei"
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A Composable Worst Case Latency Analysis for Multi-Rank DRAM Devices under Open Row Policy
Wu, Zheng Pei; Pellizzoni, Rodolfo; Guo, Danlu (Springer, 2017-04-12)As multi-core systems are becoming more popular in real-time embedded systems, strict timing requirements for accessing shared resources must be met. In particular, a detailed latency analysis for Double Data Rate Dynamic ... -
Worst Case Analysis of DRAM Latency in Hard Real Time Systems
Wu, Zheng Pei (University of Waterloo, 2013-12-17)As multi-core systems are becoming more popular in real time embedded systems, strict timing requirements for accessing shared resources must be met. In particular, a detailed latency analysis for Double Data Rate Dynamic ...